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Switch device for facilitating switching in data-driven intelligent network |
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Configurable vector length computer processor |
Eric P. Lundberg, Abdulla M. Bataineh, Timothy J. Johnson, Michael Allen Parker, James R. Kohn +2 more |
2013-12-03 |
| 8307194 |
Relaxed memory consistency model |
Steven L. Scott, Brick Stephenson, William T. Moore, James R. Kohn |
2012-11-06 |
| 7743223 |
Decoupling of write address from its associated write data in a store to a shared memory in a multiprocessor system |
Steven L. Scott |
2010-06-22 |
| 7519771 |
System and method for processing memory instructions using a forced order queue |
Eric P. Lundberg, Steven L. Scott, Robert Baird |
2009-04-14 |
| 7437521 |
Multistream processing memory-and barrier-synchronization method and apparatus |
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| 7334110 |
Decoupled scalar/vector computer architecture system and method |
Steven L. Scott, Eric P. Lundberg, William T. Moore, Timothy J. Johnson |
2008-02-19 |
| 6665774 |
Vector and scalar data cache for a vector multiprocessor |
Eric P. Lundberg |
2003-12-16 |
| 6496902 |
Vector and scalar data cache for a vector multiprocessor |
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2002-12-17 |