Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6779142 | Apparatus and method for interfacing a high speed scan-path with slow-speed test equipment | Steve Lang | 2004-08-17 |
| 6408401 | Embedded RAM with self-test and self-repair with spare rows and columns | Donald A. Priore | 2002-06-18 |
| 6286116 | Built-in test method for content addressable memories | — | 2001-09-04 |
| 6260166 | Observability register architecture for efficient production test and debug | Michael K. Gowan | 2001-07-10 |
| 6163864 | Method for cost-effective production testing of input voltage levels of the forwarded clock interface of high performance integrated circuits | Larry L. Biro | 2000-12-19 |
| 6076176 | Encoding of failing bit addresses to facilitate multi-bit failure detect using a wired-OR scheme | Donald A. Priore, Tina P. Zou | 2000-06-13 |
| 5627842 | Architecture for system-wide standardized intra-module and inter-module fault testing | Joseph Harrington Matanane Brown | 1997-05-06 |
| 4669061 | Scannable flip-flop | — | 1987-05-26 |
| 4498172 | System for polynomial division self-testing of digital networks | — | 1985-02-05 |