Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6104251 | Method and apparatus for providing transient suppression in a central processor unit (CPU) phase locked loop clock (PLL) clock signal synthesis circuit | Vincent Kaenel | 2000-08-15 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6104251 | Method and apparatus for providing transient suppression in a central processor unit (CPU) phase locked loop clock (PLL) clock signal synthesis circuit | Vincent Kaenel | 2000-08-15 |