Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11340794 | Multiprocessor system with independent direct access to bulk solid state memory resources | Mark Himelstein, James A. Yarbrough, Rick Carlson, Vishwas Durai, Vikram Venkataraghavan +5 more | 2022-05-24 |
| 11010054 | Exabyte-scale data processing system | Mark Himelstein, Richard H. Van Gaasbeck, Todd Wilde, Rick Carlson, Vikram Venkataraghavan +3 more | 2021-05-18 |
| 10713334 | Data processing system with a scalable architecture over ethernet | Mark Himelstein, Richard Van Gaasbeck, Todd Wilde, Rick Carlson, Vikram Venkataraghavan +3 more | 2020-07-14 |
| 10515014 | Non-uniform memory access (NUMA) mechanism for accessing memory with cache coherence | Mark Himelstein, Kevin Rowett, Richard H. Van Gaasbeck, Todd Wilde, Rick Carlson +3 more | 2019-12-24 |
| 10503416 | Flash memory complex with a replication interface to replicate data to another flash memory complex of a data processing system | Mark Himelstein, Richard H. Van Gaasbeck, Todd Wilde, Rick Carlson, Vikram Venkataraghavan +3 more | 2019-12-10 |
| 10496284 | Software-implemented flash translation layer policies in a data processing system | Mark Himelstein, Richard H. Van Gaasbeck, Todd Wilde, Rick Carlson, Vikram Venkataraghavan +3 more | 2019-12-03 |
| 10410693 | Multiprocessor system with independent direct access to bulk solid state memory resources | Frederic Roy Carlson, Jr., Mark Himelstein, Dan Arai, David R. Emberson | 2019-09-10 |
| 10209904 | Multiprocessor system with independent direct access to bulk solid state memory resources | Mark Himelstein, James A. Yarbrough, Rick Carlson, Vishwas Durai, Vikram Venkataraghavan +5 more | 2019-02-19 |
| 9899996 | Recursive lookup with a hardware trie structure that has no sequential logic elements | Gavin J. Stark | 2018-02-20 |
| 9519615 | Multiprocessor system with independent direct access to bulk solid state memory resources | Frederic Roy Carlson, Jr., Mark Himelstein, Dan Arai, David R. Emberson | 2016-12-13 |
| 8902902 | Recursive lookup with a hardware trie structure that has no sequential logic elements | Gavin J. Stark | 2014-12-02 |
| 7558270 | Architecture for high speed class of service enabled linecard | Yie-Fong Dan | 2009-07-07 |
| 7031323 | Method and apparatus for distributed bandwidth allocation for a bi-directional ring media with spatial and local reuse | Hon Wah Chin, David Tsiang, Anthony Bates, Robert M. Broberg | 2006-04-18 |
| 6990099 | Multiple parallel packet routing lookup | — | 2006-01-24 |
| 6968392 | Method and apparatus providing improved statistics collection for high bandwidth interfaces supporting multiple connections | Jan Medved, Stephan Crandall | 2005-11-22 |
| 6757791 | Method and apparatus for reordering packet data units in storage queues for reading and writing memory | Robert O'Grady, Sonny Tran, Yie-Fong Dan | 2004-06-29 |
| 6687247 | Architecture for high speed class of service enabled linecard | Yie-Fong Dan | 2004-02-03 |
| 6603765 | Load sharing across flows | Thomas Dejanovic | 2003-08-05 |
| 6567404 | Multiprotocol packet recognition and switching | — | 2003-05-20 |
| 6512766 | Enhanced internet packet routing lookup | — | 2003-01-28 |
| 6314110 | Method and apparatus for distributed bandwidth allocation for a bi-directional ring media with spatial and local reuse | Hon Wah Chin, David Tsiang, Anthony Bates, Robert M. Broberg | 2001-11-06 |
| 6212183 | Multiple parallel packet routing lookup | — | 2001-04-03 |
| 6157641 | Multiprotocol packet recognition and switching | — | 2000-12-05 |
| 6111877 | Load sharing across flows | Thomas Dejanovic | 2000-08-29 |
| 5509006 | Apparatus and method for switching packets using tree memory | Bruce Sherry, David Tsiang, Anthony Joseph Li | 1996-04-16 |