| 8112584 |
Storage controller performing a set of multiple operations on cached data with a no-miss guarantee until all of the operations are complete |
John J. Williams, Jr., John Andrew Fingerhut, Man Kit Tang |
2012-02-07 |
| 7856512 |
System and method for offloading a processor tasked with calendar processing |
Stephen C. Hilla, Timothy Marsteiner |
2010-12-21 |
| 7739426 |
Descriptor transfer logic |
Donald E. Steiss, Christopher E. White, Jonathan Rosen, John Andrew Fingerhut |
2010-06-15 |
| 7564790 |
Method and system for shaping traffic in a parallel queuing hierarchy |
Brian Lance Hiltscher, Mohammed Ismael Tatar, Tim Webster |
2009-07-21 |
| 7100021 |
Barrier synchronization mechanism for processors of a systolic array |
John Marshall, Darren Kerr |
2006-08-29 |
| 7069268 |
System and method for identifying data using parallel hashing |
Jeffery B. Scott |
2006-06-27 |
| 6986022 |
Boundary synchronization mechanism for a processor of a systolic array |
John Marshall, Darren Kerr |
2006-01-10 |
| 6895013 |
Coherent access to and update of configuration information in multiprocessor environment |
Randal Everhart |
2005-05-17 |
| 6847645 |
Method and apparatus for controlling packet header buffer wrap around in a forwarding engine of an intermediate network node |
Kenneth H. Potter, Jr. |
2005-01-25 |
| 6757298 |
VLAN trunking over ATM PVCs (VTAP) |
Christopher J. Lefelhocz, Kenneth H. Potter, Jr. |
2004-06-29 |