Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7376920 | Method to monitor critical dimension of IC interconnect | Hua Qian | 2008-05-20 |
| 6743694 | Method of wafer marking for multi-layer metal processes | KAY LEE | 2004-06-01 |
| 6713335 | Method of self-aligning a damascene gate structure to isolation regions | Daniel Yen, Wei Cheng, Chester Nieh, Tong Boon Lee | 2004-03-30 |