Issued Patents All Time
Showing 26–36 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5382923 | Charge-pump circuit for use in phase locked loop | Toshizi Shimada, Yoshio Watanabe | 1995-01-17 |
| 5327021 | Waveform synthesizing circuit | Toshizi Shimada, Takahiko Nakao, Yoshio Watanabe | 1994-07-05 |
| 5144158 | ECL latch circuit having a noise resistance circuit in only one feedback path | Kazumasa Nawata, Mitsuhisa Shimizu, Hiroki Yada, Taichi Saitoh, Toshiaki Sakai | 1992-09-01 |
| 4918563 | ECL gate array semiconductor device with protective elements | Kazumasa Nawata, Mitsuhisa Shimizu, Toshiaki Sakai | 1990-04-17 |
| 4866303 | ECL gate array with collector resistance compensation for distance from power supply pad | Kazumasa Nawata, Mitsuhisa Shimizu | 1989-09-12 |
| 4779011 | Latch circuit having two hold loops | Hiroyuki Tsunoi, Eiji Sugiyama, Motohiro Seto, Naoyuki Ando | 1988-10-18 |
| 4678935 | Inner bias circuit for generating ECL bias voltages from a single common bias voltage reference | Kazumasa Nawata | 1987-07-07 |
| 4678942 | Emitter coupled logic circuit with high drivability for capacitive load | Taichi Saitoh | 1987-07-07 |
| 4599521 | Bias circuit with voltage and temperature compensation for an emitter coupled logic circuit | Eiji Sugiyama, Kazumasa Nawata | 1986-07-08 |
| 4530002 | Connection lead arrangement for a semiconductor device | — | 1985-07-16 |
| 4410816 | ECL Integrated circuit | — | 1983-10-18 |