Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10515168 | Formal verification using microtransactions | Pankaj P. Chauhan, Sameer Kapoor, Saurabh Jain, Kunal Bindal, Bryan Darrell Bowyer +3 more | 2019-12-24 |
| 9817929 | Formal verification using microtransactions | Pankaj P. Chauhan, Sameer Kapoor, Saurabh Jain, Kunal Bindal, Bryan Darrell Bowyer +3 more | 2017-11-14 |
| 8219949 | Nonsequential hardware design synthesis verification | Robert J. Condon, Bryan Darrell Bowyer | 2012-07-10 |
| 8205175 | Structured algorithmic programming language approach to system design | Simon Joshua Waters, Peter Pius Gutberlet | 2012-06-19 |
| 7840931 | Loop manipulation if a behavioral synthesis tool | Peter Pius Gutberlet, Michael F. Fingeroff | 2010-11-23 |
| 7412684 | Loop manipulation in a behavioral synthesis tool | Peter Pius Gutberlet, Bryan Darrell Bowyer | 2008-08-12 |
| 7353491 | Optimization of memory accesses in a circuit design | Peter Pius Gutberlet, Michael F. Fingeroff | 2008-04-01 |
| 7308672 | Structured algorithmic programming language approach to system design | Simon Joshua Waters, Peter Pius Gutberlet | 2007-12-11 |
| 6701501 | Structured algorithmic programming language approach to system design | Simon Joshua Waters, Peter Pius Gutberlet | 2004-03-02 |