JB

Jehoshua Bruck

Caltech: 22 patents #61 of 4,321Top 2%
IBM: 21 patents #5,175 of 70,183Top 8%
TS Texas A&M University System: 4 patents #166 of 1,706Top 10%
EM Emc: 3 patents #978 of 3,345Top 30%
NT New Jersey Institute Of Technology: 1 patents #161 of 441Top 40%
SF SUNY Research Foundation: 1 patents #469 of 1,165Top 45%
🗺 California: #8,171 of 386,348 inventorsTop 3%
Overall (All Time): #56,569 of 4,157,543Top 2%
49
Patents All Time

Issued Patents All Time

Showing 26–49 of 49 patents

Patent #TitleCo-InventorsDate
7129863 Interval modulation coding Saleem Mukhtar 2006-10-31
6801949 Distributed server cluster with graphical user interface Vasken Bohossian, Chenggong Fan, Paul LeMahieu, Philip Love 2004-10-05
6691165 Distributed server cluster for controlling network traffic Vasken Bohossian, Chenggong Fan, Paul LeMahieu, Philip Love 2004-02-10
6279128 Autonomous system for recognition of patterns formed by stored data during computer memory scrubbing William C. Arnold, Jeffrey O. Kephart, Gregory Bret Sorkin, Steve R. White, David M. Chess +2 more 2001-08-21
6226683 Increasing probability multi-stage network Howard Thomas Olnowich, James William Feeney, Eli Upfal 2001-05-01
6034956 Method of simultaneously attempting parallel path connections in a multi-stage interconnection network Howard Thomas Olnowich, Michael Hans Fisher, Joel Gould, John D. Jabusch, Arthur R. Williams 2000-03-07
5890151 Method and system for performing partial-sum queries on a data cube Rakesh Agrawal, Ching-Tien Ho 1999-03-30
5835024 Multi-stage interconnection network with selectable function switching apparatus Howard Thomas Olnowich, James William Feeney, Michael Hans Fisher, Eliezer Upfal, Arthur R. Williams 1998-11-10
5778011 Method and apparatus for writing and protecting against random and cluster errors in image blocks Mario Blaum, Florian Pestoni, Felix Gustavo Emilio Safar, Jorge L. C. Sanz 1998-07-07
5774067 Flash-flooding multi-stage interconnection network with parallel path seeking switching elements Howard Thomas Olnowich, Michael Hans Fisher, Joel Gould, John D. Jabusch, Arthur R. Williams 1998-06-30
5734826 Variable cyclic redundancy coding method and apparatus for use in a multistage network Howard Thomas Olnowich, Miguel M. Blaum 1998-03-31
5579475 Method and means for encoding and rebuilding the data contents of up to two unavailable DASDS in a DASD array using simple non-recursive diagonal and row parity Miguel M. Blaum, James T. Brady, Jaishankar Moothedath Menon 1996-11-26
5561805 System for selectively packing together datablocks and efficiently routing independent of network topology in a parallel computer system in accordance with a selected numbering system Ching-Tien Ho, Shlomo Kipnis 1996-10-01
5542048 Increasing probability multi-stage network Howard Thomas Olnowich, James William Feeney, Eli Upfal 1996-07-30
5513313 Method for generating hierarchical fault-tolerant mesh architectures Robert E. Cypher, Ching-Tien Ho 1996-04-30
5461631 Method for bit resynchronization of code-constrained sequences Miguel M. Blaum, Constantin Michael Melas 1995-10-24
5386420 Coding method for correction and detection of skewed transitions in parallel asynchronous communication systems Miguel M. Blaum 1995-01-31
5357528 Depth-2 threshold logic circuits for logic and arithmetic functions Noga Alon 1994-10-18
5345229 Adaptive switching apparatus for multi-stage networks Howard Thomas Olnowich, Marc Snir, Eli Upfal 1994-09-06
5285454 Method and apparatus for encoding and decoding unordered error correcting codes Miguel M. Blaum 1994-02-08
5280533 Coding method for skewed transition correction in parallel asynchronous communication systems Miguel M. Blaum 1994-01-18
5280485 Coding method for skewed transition detection in parallel asynchronous communication system Miguel M. Blaum 1994-01-18
5280607 Method and apparatus for tolerating faults in mesh architectures Robert E. Cypher, Ching-Thien Ho 1994-01-18
5271014 Method and apparatus for a fault-tolerant mesh with spare nodes Robert E. Cypher, Ching-Tien Ho 1993-12-14