WK

William Kao

CS Cadence Design Systems: 10 patents #117 of 2,263Top 6%
O2 O2Micro: 1 patents #68 of 154Top 45%
📍 Saratoga, CA: #788 of 2,933 inventorsTop 30%
🗺 California: #55,401 of 386,348 inventorsTop 15%
Overall (All Time): #466,714 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDate
8327300 Place and route tool that incorporates a metal-fill mechanism Thanh Vinh Vuong, David C. Noice 2012-12-04
8161425 Method and system for implementing timing aware metal fill David C. Noice, Gary Nunn, Inhwan Seo, Xiaopeng Dong 2012-04-17
7865850 Method and apparatus for substrate noise aware floor planning for integrated circuit design Xiaopeng Dong 2011-01-04
7865858 Method, system, and article of manufacture for implementing metal-fill with power or ground connection Thanh Vinh Vuong, David C. Noice 2011-01-04
7661078 Method and system for implementing metal fill David C. Noice, Inhwan Seo, Xiaopeng Dong, Gary Nunn 2010-02-09
7574685 Method, system, and article of manufacture for reducing via failures in an integrated circuit design Xiaopeng Dong, Inhwan Seo, David C. Noice, Gary Nunn 2009-08-11
7557540 Capacity measurement system for a battery with open circuit voltage detection Vincent Hou, Liusheng Liu 2009-07-07
7328419 Place and route tool that incorporates a metal-fill mechanism Thanh Vinh Vuong, David C. Noice 2008-02-05
7287324 Method, system, and article of manufacture for implementing metal-fill on an integrated circuit Thanh Vinh Vuong, David C. Noice 2007-10-30
7231624 Method, system, and article of manufacture for implementing metal-fill with power or ground connection Thanh Vinh Vuong, David C. Noice 2007-06-12
5768479 Circuit layout technique with template-driven placement using fuzzy logic George J. Gadelkarim, Ted Vucurevich 1998-06-16