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CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
📍 Fremont, CA: #4,197 of 9,298 inventorsTop 50%
🗺 California: #149,087 of 386,348 inventorsTop 40%
Overall (All Time): #1,551,655 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
8161425 Method and system for implementing timing aware metal fill David C. Noice, Gary Nunn, William Kao, Xiaopeng Dong 2012-04-17
7661078 Method and system for implementing metal fill David C. Noice, William Kao, Xiaopeng Dong, Gary Nunn 2010-02-09
7574685 Method, system, and article of manufacture for reducing via failures in an integrated circuit design Xiaopeng Dong, William Kao, David C. Noice, Gary Nunn 2009-08-11