WG

William Gaskins

CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
LP Lenovo (Singapore) Pte.: 1 patents #697 of 1,301Top 55%
Overall (All Time): #1,418,860 of 4,157,543Top 35%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
11409931 Systems and methods for optimizing scan pipelining in hierarchical test design Jagjot Kaur 2022-08-09
7566355 Vent protector device for exhaust vents of buildings 2009-07-28
7296143 Method and system for loading processor boot code from serial flash memory Kevin M. Jackson 2007-11-13