SS

Sudeep Kumar Srivastava

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
📍 Noida, IN: #227 of 795 inventorsTop 30%
Overall (All Time): #1,902,687 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10803219 Method and system for combined formal static analysis of a design code Maayan Ziv, Hanna Nizar, Kanwar Pal Singh 2020-10-13
10599797 System, method, and computer program product for grouping one or more failures in a formal verification Nizar Hanna, Kanwar Pal Singh, Maayan Ziv, Tamer Mograbi, Sanaa Halloun 2020-03-24