SH

Sanaa Halloun

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
Overall (All Time): #1,902,686 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10769333 System, method, and computer program product for debugging one or more observable failures in a formal verification Maayan Ziv, Nizar Hanna 2020-09-08
10599797 System, method, and computer program product for grouping one or more failures in a formal verification Nizar Hanna, Kanwar Pal Singh, Maayan Ziv, Sudeep Kumar Srivastava, Tamer Mograbi 2020-03-24