Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12276953 | Multi-market resource dispatch optimization | Peeyush KUMAR, Lucien Werner, Shivkumar Kalyanaraman, Weiwei Yang, Tanuja Hrishikesh Ganu +3 more | 2025-04-15 |
| 8516196 | Resource sharing to reduce implementation costs in a multicore processor | Prashant Jain, Yoganand Chillarige, Sandip Das, Shukur Moulali Pathan, Sanjay Patel | 2013-08-20 |
| 8448116 | Analog/digital partitioning of circuit designs for simulation | Chandrashekar L. Chetput, Abhijeet Kolpekwar | 2013-05-21 |
| 8195883 | Resource sharing to reduce implementation costs in a multicore processor | Prashant Jain, Yoganand Chillarige, Sandip Das, Shukur Moulali Pathan, Sanjay Patel | 2012-06-05 |
| 8145848 | Processor and method for writeback buffer reuse | Prashant Jain, Jeffrey Thomas Oplinger | 2012-03-27 |
| 7979262 | Method for verifying connectivity of electrical circuit components | Abhijeet Kolpekwar, Chandrashekar L. Chetput | 2011-07-12 |
| 7797659 | Analog/digital partitioning of circuit designs for simulation | Chandrashekar L. Chetput, Abhijeet Kolpekwar | 2010-09-14 |
| 6389566 | Edge-triggered scan flip-flop and one-pass scan synthesis methodology | Kenneth D. Wagner, Mehran Amerian | 2002-05-14 |