SK

Srinivas R. Kommoori

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
📍 Milpitas, CA: #1,602 of 3,192 inventorsTop 55%
🗺 California: #185,134 of 386,348 inventorsTop 50%
Overall (All Time): #2,102,456 of 4,157,543Top 55%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
7886238 Visual yield analysis of intergrated circuit layouts Harsh Sharma, Rajeev Srivastava, Bharat Bhushan, Mithunjoy Parui, Albert Y. Lee 2011-02-08
7810063 Graphical user interface for prototyping early instance density Harsh Sharma, Po-chiang Albert Lee, Rajeev Srivastava, Bharat Bhushan, Mithunjoy Parui 2010-10-05