MP

Mithunjoy Parui

CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
Overall (All Time): #1,558,654 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7886238 Visual yield analysis of intergrated circuit layouts Harsh Sharma, Rajeev Srivastava, Srinivas R. Kommoori, Bharat Bhushan, Albert Y. Lee 2011-02-08
7810063 Graphical user interface for prototyping early instance density Harsh Sharma, Po-chiang Albert Lee, Rajeev Srivastava, Srinivas R. Kommoori, Bharat Bhushan 2010-10-05
7600208 Automatic placement of decoupling capacitors Harsh Sharma, Rajeev Srivastava, Srivinas R. Kommoori, Bharat Bhushan, Albert Y. Lee 2009-10-06