PK

Paul W. Kollaritsch

CS Cadence Design Systems: 5 patents #303 of 2,263Top 15%
BL Bell Telephone Laboratories: 1 patents #567 of 1,445Top 40%
📍 Solana Beach, CA: #145 of 500 inventorsTop 30%
🗺 California: #93,399 of 386,348 inventorsTop 25%
Overall (All Time): #827,309 of 4,157,543Top 20%
6
Patents All Time

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
10540470 Generating a power grid for an integrated circuit 2020-01-21
10242145 Optimizing a power grid for an integrated circuit Harpreet Singh ANAND, Mohan Kumar Chalamalashatty 2019-03-26
9760667 Method, system, and computer program product for implementing prototyping and floorplanning of electronic circuit designs Oleg Levitsky 2017-09-12
8719743 Method and system for implementing clock tree prototyping Oleg Levitsky, Lokeswara R. Korlipara 2014-05-06
8707228 Method and system for implementing hierarchical prototyping of electronic designs Ping-Chih Wu 2014-04-22
4433331 Programmable logic array interconnection matrix 1984-02-21