KT

Kyle Satoshi Tsukamoto

CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
KT Kabushiki Kaisha Toshiba: 1 patents #13,537 of 21,451Top 65%
📍 San Jose, CA: #17,604 of 32,062 inventorsTop 55%
🗺 California: #185,134 of 386,348 inventorsTop 50%
Overall (All Time): #1,998,962 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
9250900 Method, system, and computer program product for implementing a microprocessor with a customizable register file bypass network James Kim, Fei Sun 2016-02-02
6360298 Load/store instruction control circuit of microprocessor and load/store instruction control method Takeki Osanai, Johnny K. Szeto 2002-03-19