KS

Kumar Subramani

CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
📍 Redwood City, CA: #3,539 of 5,061 inventorsTop 70%
🗺 California: #247,236 of 386,348 inventorsTop 65%
Overall (All Time): #3,050,043 of 4,157,543Top 75%
1
Patents All Time

Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
9018995 Integrated clock gating cell for circuits with double edge triggered flip-flops Radu Zlatanovici 2015-04-28