KC

Kuang-Wei Chiang

CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
AT AT&T: 1 patents #10,626 of 18,772Top 60%
📍 Easton, PA: #173 of 611 inventorsTop 30%
🗺 Pennsylvania: #19,182 of 74,527 inventorsTop 30%
Overall (All Time): #1,240,055 of 4,157,543Top 30%
4
Patents All Time

Issued Patents All Time

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
8024677 Methods and mechanisms for inserting metal fill data Terrence A. Lenahan 2011-09-20
7725859 Methods and mechanisms for inserting metal fill data Terrence A. Lenahan, Jue Wang 2010-05-25
7448010 Methods and mechanisms for implementing virtual metal fill Terrence A. Lenahan 2008-11-04
5613102 Method of compressing data for use in performing VLSI mask layout verification Chi-Yuan Lo, Doowan Paik, Shun-Lin Su 1997-03-18