KM

Kamlesh Kumar Madheshiya

CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
📍 San Jose, CA: #22,480 of 32,062 inventorsTop 75%
🗺 California: #247,236 of 386,348 inventorsTop 65%
Overall (All Time): #2,850,014 of 4,157,543Top 70%
1
Patents All Time

Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10248746 Method and apparatus for estimating ideal power of an integrated circuit design Ajay Singh Bisht, Jayanta Roy, Kunwar Prashant 2019-04-02