HC

Hsien-Yen Chiu

CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
📍 Sunnyvale, CA: #4,767 of 14,302 inventorsTop 35%
🗺 California: #106,790 of 386,348 inventorsTop 30%
Overall (All Time): #1,022,465 of 4,157,543Top 25%
5
Patents All Time

Issued Patents All Time

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
8005660 Hierarchical stochastic analysis process optimization for integrated circuit design and manufacture Meiling Wang, Jun Li 2011-08-23
7549134 Method and system for performing crosstalk analysis Jun Li, Athanasius W. Spyrou, Hong Zhao 2009-06-16
7243320 Stochastic analysis process optimization for integrated circuit design and manufacture Meiling Wang, Jun Li 2007-07-10
7073140 Method and system for performing crosstalk analysis Jun Li, Athanasius W. Spyrou, Hong Zhao 2006-07-04
6721929 High accuracy timing model for integrated circuit verification Jun Li, Hong Zhao 2004-04-13