Issued Patents All Time
Showing 26–29 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7533358 | Integrated sizing, layout, and extractor tool for circuit design | Prakash Gopalakrishnan | 2009-05-12 |
| 7493574 | Method and system for improving yield of an integrated circuit | Rodney Phelps | 2009-02-17 |
| 7346868 | Method and system for evaluating design costs of an integrated circuit | Rodney Phelps, Amith Singhee | 2008-03-18 |
| 6957400 | Method and apparatus for quantifying tradeoffs for multiple competing goals in circuit design | Rodney Phelps, Rob A. Rutenbar | 2005-10-18 |