HC

Haizhou Chen

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
SY Synopsys: 1 patents #1,143 of 2,302Top 50%
📍 Goleta, CA: #459 of 1,303 inventorsTop 40%
🗺 California: #149,087 of 386,348 inventorsTop 40%
Overall (All Time): #1,554,083 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
8225248 Timing, noise, and power analysis of integrated circuits Li-Fu Chang, Richard P. Rouse, Nishath Verghese 2012-07-17
7673260 Modeling device variations in integrated circuit design Li-Fu Chang, Richard P. Rouse, Nishath Verghese 2010-03-02
6212665 Efficient power analysis method for logic cells with many output switchings Amir Masoud Zarkesh 2001-04-03