DS

Dewi Farrah Santoso

CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
📍 San Jose, CA: #22,480 of 32,062 inventorsTop 75%
🗺 California: #247,236 of 386,348 inventorsTop 65%
Overall (All Time): #2,575,443 of 4,157,543Top 65%
1
Patents All Time

Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
11615229 Pattern-based formal description language for describing a power/ground routing structure in an integrated circuit design Stefanus Mantik, Jianmin Li, Dennis Huang, Ting Li, Ming Zhang 2023-03-28