Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10586000 | Current modeling process | Bhuvnesh Kumar, Xin Gu | 2020-03-10 |
| 10540464 | Critical path aware voltage drop analysis of an integrated circuit | Suketu Desai, Apurva H. Soni, Shivani Sharma, Avnish Varma, Xin Gu | 2020-01-21 |
| 10460055 | Modeling of sequential circuit devices of multi-clock domain IC design for a transient vectorless power analysis | Yuvaraj Gogoi, Bhuvnesh Kumar, Suketu Desai | 2019-10-29 |
| 10387595 | Systems and methods for modeling integrated clock gates activity for transient vectorless power analysis of an integrated circuit | Avnish Varma, Suketu Desai | 2019-08-20 |