AK

Alexey Kalinov

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
Overall (All Time): #1,867,641 of 4,157,543Top 45%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10909301 Method and apparatus for determining waiver applicability conditions and applying the conditions to multiple errors or warnings in physical verification tools Douglas M. Den Dulk, Andrey Freidlin 2021-02-02
10216888 Constraint validation process Mikhail Kanshin, Andrey Freidlin, Andrei Savelev, Douglas M. Den Dulk, Wojciech Wojciak 2019-02-26