AK

Abhishek Kanungo

CS Cadence Design Systems: 4 patents #399 of 2,263Top 20%
📍 Sidhauli, NH: #1 of 1 inventorsTop 100%
Overall (All Time): #1,156,288 of 4,157,543Top 30%
4
Patents All Time

Issued Patents All Time

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
11023637 Hybrid deferred assertion for circuit design Amit Kohli, Sulabh Nangalia, Apurva Kalia, Yonghao Chen, Mickey Rodriguez 2021-06-01
8997068 Method and system for providing an implicit unknown value to user ENUM data constructs in an HDL system to model power shutoff in simulation Phil Giangarra, Yonghao Chen, Franz Erich Marschner 2015-03-31
8775150 Method and system for providing an implicit unknown value to user enum data constructs in an HDL system to model power shutoff in simulation Phil Giangarra, Yonghao Chen, Franz Erich Marschner 2014-07-08
7890902 Methods and apparatus for merging coverage for multiple verification and design scenarios Bijaya Kumar Sahu, Sandeep Pagey, Christer Cederberg 2011-02-15