Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4654780 | Parallel register transfer mechanism for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes | Mark R. Scheevel, Brent C. Bolton | 1987-03-31 |
| 4644464 | Graph manager for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes | Mark R. Scheevel, Frank A. Williams | 1987-02-17 |
| 4616315 | System memory for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes | Mark R. Scheevel, Michael A. Winchell | 1986-10-07 |
| 4615003 | Condition concentrator and control store for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes | Mark R. Scheevel | 1986-09-30 |
| 4598361 | Allocator for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes | Mark R. Scheevel, Frank A. Williams | 1986-07-01 |
| 4502118 | Concurrent network of reduction processors for executing programs stored as treelike graphs employing variable-free applicative language codes | Carl F. Hagenmaier, Jr., Brent C. Bolton, Robert L. Miner, Jr. | 1985-02-26 |
| 4498133 | Selector switch for a concurrent network of processors | Brent C. Bolton, Carl F. Hagenmaier, Jr., Jesse R. Wilson | 1985-02-05 |
| 4488151 | Arbiter switch for a concurrent network of processors | Brent C. Bolton, Carl F. Hagenmaier, Jr., Jesse R. Wilson | 1984-12-11 |
| 4484325 | Four way selector switch for a five port module as a node asynchronous speed independent network of concurrent processors | Jesse R. Wilson | 1984-11-20 |
| 4482996 | Five port module as a node in an asynchronous speed independent network of concurrent processors | Jesse R. Wilson | 1984-11-13 |
| 4475188 | Four way arbiter switch for a five port module as a node in an asynchronous speed independent network of concurrent processors | Jesse R. Wilson | 1984-10-02 |
| 4447875 | Reduction processor for executing programs stored as treelike graphs employing variable-free applicative language codes | Brent C. Bolton, Carl F. Hagenmaier, Jr., Robert L. Miner, Jr. | 1984-05-08 |