Issued Patents All Time
Showing 26–50 of 51 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6936495 | Method of making an optoelectronic semiconductor package device | — | 2005-08-30 |
| 6908794 | Method of making a semiconductor package device that includes a conductive trace with recessed and non-recessed portions | — | 2005-06-21 |
| 6891276 | Semiconductor package device | — | 2005-05-10 |
| 6846735 | Compliant test probe with jagged contact surface | Charles W. C. Lin | 2005-01-25 |
| 6809414 | Semiconductor chip assembly with bumped conductive trace | Charles W. C. Lin | 2004-10-26 |
| 6803651 | Optoelectronic semiconductor package device | — | 2004-10-12 |
| 6800506 | Method of making a bumped terminal in a laminated structure for a semiconductor chip assembly | Charles W. C. Lin | 2004-10-05 |
| 6794741 | Three-dimensional stacked semiconductor package with pillars in pillar cavities | Charles W. C. Lin, David M. Sigmond | 2004-09-21 |
| 6774659 | Method of testing a semiconductor package device | — | 2004-08-10 |
| 6744126 | Multichip semiconductor package device | — | 2004-06-01 |
| 6740576 | Method of making a contact terminal with a plated metal peripheral sidewall portion for a semiconductor chip assembly | Charles W. C. Lin | 2004-05-25 |
| 6716670 | Method of forming a three-dimensional stacked semiconductor package device | — | 2004-04-06 |
| 6699780 | Method of connecting a conductive trace to a semiconductor chip using plasma undercut etching | Charles W. C. Lin | 2004-03-02 |
| 6667229 | Method of connecting a bumped compliant conductive trace and an insulative base to a semiconductor chip | Charles W. C. Lin | 2003-12-23 |
| 6608374 | Semiconductor chip assembly with bumped conductive trace | Charles W. C. Lin | 2003-08-19 |
| 6576493 | Method of connecting a conductive trace and an insulative base to a semiconductor chip using multiple etch steps | Charles W. C. Lin | 2003-06-10 |
| 6537851 | Method of connecting a bumped compliant conductive trace to a semiconductor chip | Charles W. C. Lin | 2003-03-25 |
| 6492252 | Method of connecting a bumped conductive trace to a semiconductor chip | Charles W. C. Lin | 2002-12-10 |
| 6486549 | Semiconductor module with encapsulant base | — | 2002-11-26 |
| 6307256 | Semiconductor package with a stacked chip on a leadframe | Shyi-Ching Liau | 2001-10-23 |
| 6259266 | Testing device and method for known good chip | Shyi-Ching Liau | 2001-07-10 |
| 5942907 | Method and apparatus for testing dies | — | 1999-08-24 |
| 5877552 | Semiconductor package for improving the capability of spreading heat and electrical function | — | 1999-03-02 |
| 5863805 | Method of packaging semiconductor chips based on lead-on-chip (LOC) architecture | — | 1999-01-26 |
| 5822848 | Lead frame having a detachable and interchangeable die-attach paddle | — | 1998-10-20 |