Issued Patents All Time
Showing 101–125 of 128 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6903970 | Flash memory device with distributed coupling between array ground and substrate | Fariborz F. Roohparvar | 2005-06-07 |
| 6859392 | Preconditioning global bitlines | Frankie F. Roohparvar | 2005-02-22 |
| 6847565 | Memory with row redundancy | Frankie F. Roohparvar | 2005-01-25 |
| 6819622 | Write and erase protection in a synchronous memory | Frankie F. Roohparvar | 2004-11-16 |
| 6809960 | High speed low voltage driver | Frankie F. Roohparvar | 2004-10-26 |
| 6785186 | Design of an high speed xdecoder driving a large wordline load consuming less switching current for use in high speed syncflash memory | — | 2004-08-31 |
| 6774426 | Flash cell with trench source-line connection | — | 2004-08-10 |
| 6747898 | Column decode circuit for high density/high performance memories | — | 2004-06-08 |
| 6721206 | Methods of accessing floating-gate memory cells having underlying source-line connections | — | 2004-04-13 |
| 6717853 | Flash memory device with distributed coupling between array ground and substrate | Fariborz F. Roohparvar | 2004-04-06 |
| 6711701 | Write and erase protection in a synchronous memory | Frankie F. Roohparvar | 2004-03-23 |
| 6711056 | Memory with row redundancy | Frankie F. Roohparvar | 2004-03-23 |
| 6671214 | Methods of operating a multiple bit line column redundancy scheme having primary and redundant local and global bit lines | Frankie F. Roohparvar | 2003-12-30 |
| 6667910 | Method and apparatus for discharging an array well in a flash memory device | Allahyar Vahidimolavi | 2003-12-23 |
| 6665221 | Multiple bit line column redundancy with primary local and global bit lines and redundant local and global bit lines | Frankie F. Roohparvar | 2003-12-16 |
| 6657913 | Array organization for high-performance memory devices | Frankie F. Roohparvar | 2003-12-02 |
| 6621751 | Method and apparatus for programming row redundancy fuses so decoding matches internal pattern of a memory array | Frankie F. Roohparvar | 2003-09-16 |
| 6566738 | Lead-over-chip leadframes | — | 2003-05-20 |
| 6560150 | Memory device testing | — | 2003-05-06 |
| 6504768 | Redundancy selection in memory devices with concurrent read and write | Frankie F. Roohparvar | 2003-01-07 |
| 6496425 | Multiple bit line column redundancy | Frankie F. Roohparvar | 2002-12-17 |
| 6456562 | Clock generation circuits | — | 2002-09-24 |
| 6445625 | Memory device redundancy selection having test inputs | — | 2002-09-03 |
| 6445603 | Architecture, package orientation and assembly of memory devices | — | 2002-09-03 |
| 6396728 | Array organization for high-performance memory devices | Frankie F. Roohparvar | 2002-05-28 |