Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8909956 | Method for managing and controlling the low power modes for an integrated circuit device | Zhiqing Zhuang, Vinay Bhasin, Lawrence J. Madar, III, Chenmin Zhang, Vafa James Rakshani | 2014-12-09 |
| 7739528 | Method for managing and controlling the low power modes for an integrated circuit device | Zhiqing Zhuang, Vinay Bhasin, Lawrence J. Madar, III, Chenmin Zhang, Vafa James Rakshani | 2010-06-15 |
| 6965974 | Dynamic partitioning of memory banks among multiple agents | Laurence E. Bays, Srinivasa Gutta, Bahram Ghaffarzadeh Kermani, Richard J. Niescier, Geoffrey Lawrence Smith +2 more | 2005-11-15 |
| 6842844 | Parameter memory for hardware accelerator | Walter Glenn Soto, Wayne Xin | 2005-01-11 |
| 6707822 | Multi-session asymmetric digital subscriber line buffering and scheduling apparatus and method | Walter Glenn Soto, Weizhuang Xin | 2004-03-16 |
| 6499087 | Synchronous memory sharing based on cycle stealing | Bahram Ghaffarzadeh Kermani, Walter Soto, Richard J. Niescier, Fan You | 2002-12-24 |
| 6496916 | System for flexible memory paging in partitioning memory | Vladimir Sindalovsky, Kenneth D. Fitch | 2002-12-17 |
| 6401176 | Multiple agent use of a multi-ported shared memory | Walter Soto | 2002-06-04 |
| 6297751 | Low-voltage joystick port interface | Raymond S. Livingston, Richard J. Niescier, David Potts | 2001-10-02 |
| 6279048 | System wake-up based on joystick movement | David Potts, Walter Soto, Avinash Velingker | 2001-08-21 |
| 6275948 | Processor powerdown operation using intermittent bursts of instruction clock | Laurence E. Bays, Kenneth D. Fitch, Richard J. Niescier | 2001-08-14 |
| 6263075 | Interrupt mechanism using TDM serial interface | Donald R. Laturell | 2001-07-17 |
| 6243459 | Telephone with adaptive speed dial mechanism | Joseph M. Cannon, James A. Johanson | 2001-06-05 |
| 6230215 | On-demand transfer engine | Srinivasa Gutta, Walter Soto, Avinash Velingker, Daniel K. Greenwood | 2001-05-08 |
| 6189076 | Shared synchronous memory with a switching circuit controlled by an arbiter and method for glitch free switching of a clock signal | Bahram Ghaffarzadeh Kermani | 2001-02-13 |
| 6108371 | System and method for writing mixed interleaved and non-interleaved data to a modem register | Frederick Harrison Fischer | 2000-08-22 |
| 6067317 | Computer bus resource port | Kenneth D. Fitch, Walter Soto | 2000-05-23 |
| 5928317 | Fast converter for left-to-right carry-free multiplier | Ravi Kolagotla, Hosahalli R. Srinivas | 1999-07-27 |
| 5861568 | Generation of wave functions by storage of parameters for piecewise linear approximations | Eduardo Abreu | 1999-01-19 |
| 5754590 | Modem architecture for integrated controller and data pump applications | Laurence E. Bays, Walter Soto | 1998-05-19 |
| 5694444 | Testable high count counter | Sonali Bagchi, Kenneth D. Fitch, Daisuke Takise | 1997-12-02 |
| 5412740 | Signal processing system having reduced memory space | — | 1995-05-02 |
| 5117291 | Technique for adjusting signal dispersion cancellation apparatus in communications systems | Jin Wang | 1992-05-26 |