| 9595335 |
Memory device and systems and methods for selecting memory cells in the memory device |
Geeng-Chuan Chern, Steven J. Schumann, Philip Ng |
2017-03-14 |
| 9142306 |
Selecting memory cells using source lines |
Geeng-Chuan Chern, Steven J. Schumann, Philip Ng |
2015-09-22 |
| 8946574 |
Two-layer sensor stack |
David Brent Guard, Esat Yilmaz |
2015-02-03 |
| 8797285 |
Panel |
David Brent Guard, Esat Yilmaz |
2014-08-05 |
| 7848151 |
Circuit to control voltage ramp rate |
Johnny Chan, Philip Ng, Alan Renninger, Jinshu Son, Jeffrey Ming-Hung Tsai +1 more |
2010-12-07 |
| 7512008 |
Circuit to control voltage ramp rate |
Johnny Chan, Philip Ng, Alan Renninger, Jinshu Son, Jeffrey Ming-Hung Tsai +1 more |
2009-03-31 |
| RE35094 |
Fabrication process for programmable and erasable MOS memory device |
Geeng-Chuan Chern |
1995-11-21 |
| 5434815 |
Stress reduction for non-volatile memory cell |
George Smarandoiu, Steven J. Schumann |
1995-07-18 |
| 5081054 |
Fabrication process for programmable and erasable MOS memory device |
Geeng-Chuan Chern |
1992-01-14 |
| 5066992 |
Programmable and erasable MOS memory device |
Geeng-Chuan Chern |
1991-11-19 |
| 4970565 |
Sealed charge storage structure |
James Hu, John Y. Huang |
1990-11-13 |
| 4859619 |
EPROM fabrication process forming tub regions for high voltage devices |
Geeng-Chuan Chern, James Hu |
1989-08-22 |
| 4822750 |
MOS floating gate memory cell containing tunneling diffusion region in contact with drain and extending under edges of field oxide |
Gust Perlegos |
1989-04-18 |
| 4701776 |
MOS floating gate memory cell and process for fabricating same |
Gust Perlegos |
1987-10-20 |