| 12160497 |
Reference clock switching in phase-locked loop circuits |
Hairong Yu, Boon-Aik Ang, Yu-Cheng Chen, Litesh Sajnani, Shaobo Liu +5 more |
2024-12-03 |
| 11256283 |
Hybrid asynchronous gray counter with non-gray zone detector for high performance phase-locked loops |
Meei-Ling Chiang, Dabin Zhang, Dennis M. Fischette, Jr., Shaobo Liu, Yu-Cheng Chen |
2022-02-22 |
| 11165416 |
Duty cycle and skew measurement and correction for differential and single-ended clock signals |
Khaled M. Alashmouny, Dennis M. Fischette, Jr., Charles L. Wang, Yikun Chang |
2021-11-02 |
| 11115037 |
Spur cancelation in phase-locked loops using a reconfigurable digital-to-time converter |
Boon-Aik Ang, Yu-Cheng Chen, Dennis M. Fischette, Jr. |
2021-09-07 |
| 11088683 |
Reconfigurable clock flipping scheme for duty cycle measurement |
Khaled M. Alashmouny, Dennis M. Fischette, Jr. |
2021-08-10 |
| 11031945 |
Time-to-digital converter circuit linearity test mechanism |
Yu-Cheng Chen, Dennis M. Fischette, Jr. |
2021-06-08 |
| 9979405 |
Adaptively reconfigurable time-to-digital converter for digital phase-locked loops |
Wei Deng, Dennis M. Fischette, Jr., Meei-Ling Chiang |
2018-05-22 |