Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12324089 | Module conductive shield including discontinuities to reduce device coupling | Loizos Loizou, Domingo Farias, Jean Briot | 2025-06-03 |
| 11121736 | Radio frequency circuit supporting carrier aggregation | Peter Molnar, Jean Briot, Mudar AlJoumayly | 2021-09-14 |
| 9419438 | Power-line communication coupling | Henry Frazier Pruett, Ravindranath Naiknaware, Jorell A. Olson | 2016-08-16 |
| 9342088 | Power point tracking | Robert Batten, Gary B. Baker, Henry Frazier Pruett, Adam Heiberg, Triet Tu Le +1 more | 2016-05-17 |
| 8860242 | Power-line communication coupling | Henry Frazier Pruett, Ravindranath Naiknaware, Jorell A. Olson | 2014-10-14 |
| 8824178 | Parallel power converter topology | Gary B. Baker, Robert Batten, Keith R. Slavin, Triet Tu Le, Ravindranath Naiknaware | 2014-09-02 |
| 8796884 | Energy conversion systems with power control | Ravindranath Naiknaware, Triet Tu Le, Robert Batten, Terri Shreeve Fiez | 2014-08-05 |
| 8207777 | Compensation with ratiometric attenuation | — | 2012-06-26 |
| 8164377 | Signal dependent compensation with matched detectors | — | 2012-04-24 |
| 7952416 | Logarithmic temperature compensation for detectors | — | 2011-05-31 |
| 7728647 | Temperature compensation for RF detectors | — | 2010-06-01 |
| 7616044 | Logarithmic temperature compensation for detectors | — | 2009-11-10 |
| 7453309 | Logarithmic temperature compensation for detectors | — | 2008-11-18 |
| 7292100 | Interpolated variable gain amplifier with multiple active feedback cells | — | 2007-11-06 |
| 7196569 | Feedback compensation for logarithmic amplifiers | — | 2007-03-27 |
| 7183794 | Correction for circuit self-heating | — | 2007-02-27 |
| 7180359 | Logarithmic temperature compensation for detectors | — | 2007-02-20 |
| 6429712 | Precision set-reset logic circuit and method | Thomas A. Gaiser, Kenneth J. Stern, Farhad Vazehgoo, William L. Walter, Edward B. Hilton | 2002-08-06 |
| 6366115 | Buffer circuit with rising and falling edge propagation delay correction and method | — | 2002-04-02 |
| 6326828 | Precision set-reset logic circuit | Thomas A. Gaiser, Kenneth J. Stern, Farhad Vazehgoo, William L. Walter, Edward B. Hilton | 2001-12-04 |
| 6307404 | Gate structures with reduced propagation-delay variations | — | 2001-10-23 |
| 6271701 | Resetting flip-flop structures and methods for high-rate trigger generation and event monitoring | — | 2001-08-07 |
| 6265901 | Fully differential logic or circuit for multiple non-overlapping inputs | Kenneth J. Stern | 2001-07-24 |