Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11501142 | Tiling control circuit for downloading and processing an input tile based on source and destination buffer availability | Victor J. Wu, Poching Sun, Justin Thant Hsin Oo | 2022-11-15 |
| 10747534 | Vectorization of wide integer data paths into parallel operations with value extraction for maintaining valid guard bands | Thomas PREUSSER | 2020-08-18 |
| 10671388 | Vectorization of wide integer data paths for parallel operations with side-band logic monitoring the numeric overflow between vector lanes | Thomas PREUSSER | 2020-06-02 |
| 8341311 | System and method for reduced latency data transfers from flash memory to host by utilizing concurrent transfers into RAM buffer memory and FIFO host interface | Leland Szewerenko | 2012-12-25 |