Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8347250 | Method and apparatus for addressing and improving holds in logic networks | George A. Gonzalez, William McGee, Vasant K. Palisetti, Ashok Tirupathy Venkatachar | 2013-01-01 |
| 8321830 | Method and apparatus for providing timing information while designing a multi-cell circuit | Frank P. Skowronski, Jeremy Schreiber, Cory P. Krug, Timothy R Snyder | 2012-11-27 |