Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8423935 | Method and apparatus for verifying output-based clock gating | Chaiyasit Manovit, Sridhar Narayanan, Wanlin Cao, Sridhar Subramanian | 2013-04-16 |
| 7260795 | Method and apparatus for integrating a simulation log into a verification environment | Guillermo Maturana | 2007-08-21 |
| 6295517 | Method and apparatus for adaptively or selectively choosing event-triggered cycle-based simulation or oblivious-triggered cycle-based simulation on a cluster-by-cluster basis | Arnob Roy, Sanjay Malpani | 2001-09-25 |