Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11329640 | Analog delay lines and analog readout systems | Charles Qingle Wu, Ken Nishimura | 2022-05-10 |
| 10069505 | Least significant bit dynamic element matching in a digital-to-analog converter | Robert E. Jewett | 2018-09-04 |
| 7492302 | Analog-to-digital converter with reduced metastable errors | — | 2009-02-17 |
| 7450044 | Sub-harmonic image mitigation in digital-to-analog conversion systems | George Stennis Moore, Nico Lugil | 2008-11-11 |
| 7439897 | Staggered interleaved Nyquist regions avoid guard band induced holes when sampling a band limited signal | Joseph M. Gorin | 2008-10-21 |
| 7375667 | Discrete synthesis using staggered Nyquist regions avoids guard band induced holes near a Nyquist limit | Stephen T. Sparks | 2008-05-20 |
| 7206907 | Reduction of noise and temperature variation in mixed-signal integrated circuits | Thomas Edward Kopley | 2007-04-17 |
| 7148828 | System and method for timing calibration of time-interleaved data converters | Andrew D. Fernandez, Vamsi Srikantam, Robert M. R. Neff | 2006-12-12 |
| 6909310 | CMOS controlled-impedance transmission line driver | Robert M. R. Neff, Jorge Pernillo, Mehrdad Heshami | 2005-06-21 |
| 6720895 | Method of calibrating an analog-to-digital converter and a circuit implementing the same | Robert M. R. Neff, Matthew S. Holcomb, James S. Kang | 2004-04-13 |
| 6707411 | Analog-to-digital converter with on-chip memory | Thomas Edward Kopley, Robert M. R. Neff | 2004-03-16 |
| 5155388 | Logic gates with controllable time delay | John Corcoran | 1992-10-13 |