TJ

Tor E. Jeremiassen

AS Agere Systems: 4 patents #355 of 1,849Top 20%
AT AT&T: 2 patents #7,280 of 18,772Top 40%
TI Texas Instruments: 2 patents #5,248 of 12,488Top 45%
Overall (All Time): #657,495 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7805708 Automatic tool to eliminate conflict cache misses 2010-09-28
7096343 Method and apparatus for splitting packets in multithreaded VLIW processor Alan D. Berenbaum, Nevin C. Heintze, Stefanos Kaxiras 2006-08-22
7007153 Method and apparatus for allocating functional units in a multithreaded VLIW processor Alan D. Berenbaum, Nevin C. Heintze, Stefanos Kaxiras 2006-02-28
6947052 Visual program memory hierarchy optimization 2005-09-20
6665791 Method and apparatus for releasing functional units in a multithreaded VLIW processor Alan D. Berenbaum, Nevin C. Heintze, Stefanos Kaxiras 2003-12-16
6658551 Method and apparatus for identifying splittable packets in a multithreaded VLIW processor Alan D. Berenbaum, Nevin C. Heintze, Stefanos Kaxiras 2003-12-02
6286027 Two step thread creation with register renaming Harry Dwyer, Hubert Rae McLellan, Jr. 2001-09-04
5778435 History-based prefetch cache including a time queue Alan D. Berenbaum 1998-07-07