Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
BY

B. Arlen Young

ADAdaptec: 52 patents #1 of 322Top 1%
MSMicro Computer Systems: 1 patents #3 of 17Top 20%
Palo Alto, CA: #324 of 9,675 inventorsTop 4%
California: #6,949 of 386,348 inventorsTop 2%
Overall (All Time): #47,860 of 4,157,543Top 2%
54 Patents All Time

Issued Patents All Time

Showing 26–50 of 54 patents

Patent #TitleCo-InventorsDate
6728791 RAID 1 read mirroring method for host adapters 2004-04-27
6718413 Contention-based methods for generating reduced number of interrupts Andrew W. Wilson, Darren R. Busing, Trung S. Luu 2004-04-06
6701385 Raid 1 write mirroring method for host adapters 2004-03-02
6609161 Two-dimensional execution queue for host adapters 2003-08-19
6535936 SCSI phase status register for use in reducing instructions executed by an on-chip sequencer in asserting a SCSI acknowledge signal and method 2003-03-18
6477601 SCSI bus free phase management structure and method of operation for parallel SCSI host adapter integrated circuits 2002-11-05
6457090 Structure and method for automatic configuration for SCSI Synchronous data transfers 2002-09-24
6415347 Hardware attention management circuit and method for parallel SCSI host adapters 2002-07-02
6408354 Data channel architecture for parallel SCSI host adapters 2002-06-18
6253272 Execution suspension and resumption in multi-tasking host adapters 2001-06-26
6243767 System for register partitioning in multi-tasking host adapters by assigning a register set and a unique identifier in each of a plurality of hardware modules 2001-06-05
6157964 Method for specifying concurrent execution of a string of I/O command blocks in a chain structure 2000-12-05
6012107 Hardware control block delivery queues for host adapters and other devices with onboard processors 2000-01-04
6006292 Method of managing hardware control blocks utilizing endless queue maintained to never be empty and containing tail pointer only accessible by process executing on system processor 1999-12-21
5991861 Method of enabling and disabling a data function in an integrated circuit 1999-11-23
5974530 Integrated PCI buffer controller and XOR function circuit 1999-10-26
5938747 Hardware command block delivery queue for host adapters and other devices with onboard processors 1999-08-17
5923896 Method for sequencing execution of I/O command blocks in a chain structure by setting hold-off flags and configuring a counter in each I/O command block 1999-07-13
5892969 Method for concurrently executing a configured string of concurrent I/O command blocks within a chain to perform a raid 5 I/O operation 1999-04-06
5881250 Host adapter system including an integrated PCI buffer controller and XOR function circuit 1999-03-09
5867732 Hardware method for verifying that an area of memory has only zero values 1999-02-02
5850567 Method for specifying concurrent execution of a string of I/O command blocks in a chain structure 1998-12-15
5812877 I/O command block chain structure in a memory 1998-09-22
5797034 Method for specifying execution of only one of a pair of I/O command blocks in a chain structure 1998-08-18
5768621 Chain manager for use in executing a chain of I/O command blocks 1998-06-16