Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7076600 | Dual purpose interface using refresh cycle | — | 2006-07-11 |
| 7042889 | Network switch with parallel working of look-up engine and network processor | Kevin Jennings, Kevin Hyland | 2006-05-09 |
| 6937624 | System for manintaining inter-packet gaps in cascade transmission system for packet-based data | — | 2005-08-30 |
| 6877145 | Automatic generation of interconnect logic components | Sean Boylan, Derek Coburn, Tadhg Creedon, Denise De Paor, Kevin Hyland +4 more | 2005-04-05 |
| 6718411 | Asic system architecture including data aggregation technique | Tadhg Creedon, Denise De Paor, Kevin Hyland, Kevin Jennings, Derek Coburn +4 more | 2004-04-06 |
| 6684258 | Stackable ring network including burst transmission of data packet | Una Quinlan, Denise De Paor, Tadhg Creedon, Nicholas Stapleton | 2004-01-27 |
| 6625684 | Application specific integrated circuit with dual-mode system for externally accessible data buses and visibility buses | Fergus Casey, Gareth E Allwright, Kam Choi, Christopher James Mccaughan Hay, Kevin Loughran +1 more | 2003-09-23 |
| 6552590 | Clocking scheme for ASIC | Susan Michelle PRATT, Tadhg Creedon, Suzanne M Hughes, Mike Lardner, Padraic O'Reilly | 2003-04-22 |
| 6486450 | Method and apparatus for inducing locally elevated temperatures in an application specific integrated circuit | Una Quinlan, Tadhg Creedon | 2002-11-26 |
| 6285674 | Hybrid distributed broadcast and unknown server for emulated local area networks | Dipak M. L. Soni, Peter Saunderson, Anne O'Connell | 2001-09-04 |
| 6151323 | Method of supporting unknown addresses in an interface for data transmission in an asynchronous transfer mode | Anne O'Connell, Dipak M. L. Soni, Peter Saunderson | 2000-11-21 |
| 6101554 | Apparatus for controlling data flow using lookup tables to link incoming packets directly to output ports | Tadhg Creedon, Anne O'Connell, Eugene O'Neill, John Hickey, Richard A. Gahan +1 more | 2000-08-08 |
| 5615382 | Data transfer system for buffering and selectively manipulating the size of data blocks being transferred between a processor and a system bus of a computer system | Michael J. Seaman, Neal Crook, Bipin Mistry | 1997-03-25 |
| 5471632 | System for transferring data between a processor and a system bus including a device which packs, unpacks, or buffers data blocks being transferred | Michael J. Seaman, Neal Crook, Bipin Mistry | 1995-11-28 |
| 5357619 | Paged memory scheme | Neal Crook, Robert J. Galuszka, John M. Lenthall, Bipin Mistry, Clinton Choi +1 more | 1994-10-18 |