| 12417186 |
Write merging on stores with different tags |
Naveen Bhoria, Timothy David Anderson |
2025-09-16 |
| 12393521 |
Methods and apparatus to facilitate write miss caching in cache system |
Naveen Bhoria, Timothy David Anderson |
2025-08-19 |
| 12380035 |
Methods and apparatus to facilitate read-modify-write support in a coherent victim cache with parallel data paths |
Naveen Bhoria, Timothy David Anderson |
2025-08-05 |
| 12321284 |
Methods and apparatus to facilitate atomic operations in victim cache |
Naveen Bhoria, Timothy David Anderson |
2025-06-03 |
| 12321285 |
Victim cache with write miss merging |
Naveen Bhoria, Timothy David Anderson |
2025-06-03 |
| 12292839 |
Write merging on stores with different privilege levels |
Naveen Bhoria, Timothy David Anderson |
2025-05-06 |
| 12265477 |
Hybrid victim cache and write miss buffer with fence operation |
Naveen Bhoria, Timothy David Anderson |
2025-04-01 |
| 12259826 |
Methods and apparatus for multi-banked victim cache with dual datapath |
Naveen Bhoria, Timothy David Anderson |
2025-03-25 |
| 12216591 |
Atomic compare and swap in a coherent cache system |
Naveen Bhoria, Timothy David Anderson |
2025-02-04 |
| 12210463 |
Aggressive write flush scheme for a victim cache |
Naveen Bhoria, Timothy David Anderson |
2025-01-28 |
| 12197331 |
Hardware coherence signaling protocol |
Abhijeet Ashok Chachad, David Matthew Thompson, Naveen Bhoria |
2025-01-14 |
| 12197347 |
Methods and apparatus to reduce bank pressure using aggressive write merging |
Naveen Bhoria, Timothy David Anderson |
2025-01-14 |
| 12189540 |
Fully pipelined read-modify-write support |
Naveen Bhoria, Timothy David Anderson |
2025-01-07 |