Issued Patents 2025
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417981 | Semiconductor device including graphene interconnect and method of making the semiconductor device | Shu-Wei Li, Yu-Chen Chan, Shin-Yi Yang | 2025-09-16 |
| 12412837 | Interconnect structure including topological material | Meng-Pei Lu, Shin-Yi Yang, Cian-Yu Chen, Yun-Chi Chiang | 2025-09-09 |
| 12411577 | Driver integrated circuit for touch sensing and driving method thereof | Guan-Shiung Huang, Hsin-Ting Chan, Ding-Teng Shih | 2025-09-09 |
| 12374637 | Semiconductor packages and methods for forming the same | Shau-Lin Shue, Shin-Yi Yang | 2025-07-29 |
| 12362233 | Methods of performing chemical-mechanical polishing process in semiconductor devices | Shih-Kang Fu, Shau-Lin Shue | 2025-07-15 |
| 12347776 | Integrated chip with graphene based interconnect | Shin-Yi Yang, Meng-Pei Lu, Chin-Lung Chung, Shau-Lin Shue | 2025-07-01 |
| 12342600 | Titanium-containing diffusion barrier for CMP removal rate enhancement and contamination reduction | Shih-Kang Fu, Shau-Lin Shue | 2025-06-24 |
| 12327760 | Interconnect structures having varied materials | Guanyu Luo, Shin-Yi Yang, Shau-Lin Shue | 2025-06-10 |
| 12315811 | Graphene barrier layer for reduced contact resistance | Shin-Yi Yang, Shau-Lin Shue | 2025-05-27 |
| 12308282 | Interconnect structure without barrier layer on bottom surface of via | Tz-Jun Kuo, Chien-Hsin Ho | 2025-05-20 |
| 12300599 | Method for forming semiconductor structure | Meng-Pei Lu, Shin-Yi Yang, Shu-Wei Li, Chin-Lung Chung | 2025-05-13 |
| 12272623 | Semiconductor packages and methods for forming the same | Shin-Yi Yang, Shau-Lin Shue | 2025-04-08 |
| 12218060 | Integrated chip with graphene based interconnect | Shin-Yi Yang, Meng-Pei Lu, Chin-Lung Chung, Shau-Lin Shue | 2025-02-04 |
| 12211740 | Interconnect structure and methods of forming the same | Shu-Wei Li, Yu-Chen Chan, Shin-Yi Yang, Shau-Lin Shue | 2025-01-28 |
| 12211788 | Hybrid interconnect structure for self aligned via | Shin-Yi Yang, Shau-Lin Shue | 2025-01-28 |
| 12211799 | Semiconductor packages and methods for forming the same | Shin-Yi Yang, Shau-Lin Shue | 2025-01-28 |
| 12205886 | Hybrid method for forming semiconductor interconnect structure | Shih-Kang Fu, Shau-Lin Shue | 2025-01-21 |