Issued Patents 2025
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424602 | Bonded assembly containing conductive via structures extending through word lines in a staircase region and methods for making the same | Masanori Tsutsumi, Mitsuteru Mushiga | 2025-09-23 |
| 12426354 | Field effect transistors with reduced gate fringe area and method of making the same | Takahito Fujita, Kiyokazu Shishido | 2025-09-23 |
| 12402311 | Three-dimensional memory device containing memory opening monitoring area and methods of making the same | Masato Miyamoto, Keisuke SHIGEMURA | 2025-08-26 |
| 12387789 | X-direction divided sub-block mode in NAND | Naohiro Hosoda | 2025-08-12 |
| 12284807 | Three-dimensional memory device with separated contact regions | Hardwell Chibvongodze, Zhixin Cui, Rajdeep Gautam | 2025-04-22 |
| 12270853 | Semiconductor wafer configured for single touch-down testing | Toru Miwa, Takashi Murai, Nisha Padattil Kuliyampattil | 2025-04-08 |