IO

Ikenna Odinaka

KC Kepler Computing: 15 patents #7 of 33Top 25%
Overall (2025): #2,720 of 469,880Top 1%
15
Patents 2025

Issued Patents 2025

Patent #TitleCo-InventorsDate
12411657 Asynchronous full-adder with majority or minority gates to generate carry-out true output Nabil Imam, Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-09-09
12405768 Asynchronous full-adder with majority or minority gates to generate carry-out false output Nabil Imam, Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-09-02
12379898 Asynchronous full-adder with majority or minority gates to generate sum false output Nabil Imam, Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-08-05
12374377 Ferroelectric or paraelectric wide-input minority or majority gate based low power adder Amrita Mathuriya, Rajeev Kumar Dokania, Rafael Rios, Sasikanth Manipatruni 2025-07-29
12334918 Stacked non-planar capacitors based multi-function linear threshold gate with input based adaptive threshold Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni 2025-06-17
12334923 Multi-cycle reset mechanism for a chain of majority gates having non-linear polar material Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-06-17
12322743 Multi-function threshold gate with input based adaptive threshold and with stacked non-planar paraelectric capacitors Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni 2025-06-03
12316319 Multi-function linear threshold gate with input based adaptive threshold Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-05-27
12308836 Method of adjusting threshold of a linear capacitive-input circuit Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-05-20
12308838 Exclusive-or logic gate with non-linear input capacitors Amrita Mathuriya, Rafael Rios, Darshak Doshi, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-05-20
12294370 Area optimized ferroelectric or paraelectric based low power multiplier Amrita Mathuriya, Rajeev Kumar Dokania, Rafael Rios, Sasikanth Manipatruni 2025-05-06
12289104 Ferroelectric or paraelectric based low power multiplier array Amrita Mathuriya, Rajeev Kumar Dokania, Rafael Rios, Sasikanth Manipatruni 2025-04-29
12283955 Majority or minority based low power checkerboard carry save multiplier with inverted multiplier cells Amrita Mathuriya, Rajeev Kumar Dokania, Rafael Rios, Sasikanth Manipatruni 2025-04-22
12218045 Stacked planar capacitors based multi-function linear threshold gate with input based adaptive threshold Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni 2025-02-04
12212321 Non-linear polar material based flip-flop Amrita Mathuriya, Rajeev Kumar Dokania, Rafael Rios, Sasikanth Manipatruni 2025-01-28