Issued Patents 2025
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423102 | Instructions to convert from FP16 to BF8 | Naveen Mellempudi, Robert Valentine, Mark J. Charney, Christopher J. Hughes, Evangelos Georganas +3 more | 2025-09-23 |
| 12417100 | Instructions for structured-sparse tile matrix FMA | Menachem Adelman, Amit Gradstein, Christopher J. Hughes, Naveen Mellempudi, Shahar Mizrahi +7 more | 2025-09-16 |
| 12405770 | Matrix transpose and multiply | Menachem Adelman, Robert Valentine, Barukh Ziv, Amit Gradstein, Simon Rubanovich +5 more | 2025-09-02 |
| 12379927 | BFLOAT16 scale and/or reduce instructions | Menachem Adelman, Robert Valentine, Zeev Sperber, Amit Gradstein, Mark J. Charney +4 more | 2025-08-05 |
| 12367045 | Instructions to convert from FP16 to BF8 | Naveen Mellempudi, Robert Valentine, Mark J. Charney, Christopher J. Hughes, Evangelos Georganas +3 more | 2025-07-22 |
| 12353878 | Apparatuses, methods, and systems for instructions for matrix multiplication instructions | Menachem Adelman, Robert Valentine, Zeev Sperber, Amit Gradstein, Simon Rubanovich +4 more | 2025-07-08 |
| 12346692 | Computer processor for higher precision computations using a mixed-precision decomposition of operations | Gregory Henry | 2025-07-01 |
| 12314727 | Optimized compute hardware for machine learning operations | Dipankar Das, Roger Gramunt, Mikhail Smelyanskiy, Jesus Corbal, Dheevatsa Mudigere +1 more | 2025-05-27 |
| 12314717 | Systems, methods, and apparatuses for dot production operations | Robert Valentine, Dan Baum, Zeev Sperber, Jesus Corbal, Elmoustapha Ould-Ahmed-Vall +5 more | 2025-05-27 |
| 12307250 | Systems and methods for performing 16-bit floating-point matrix dot product instructions | Robert Valentine, Mark J. Charney, Raanan Sade, Menachem Adelman, Zeev Sperber +2 more | 2025-05-20 |
| 12293186 | Systems and methods to store a tile register pair to memory | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Robert Valentine +5 more | 2025-05-06 |
| 12287843 | Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elements | Dan Baum, Chen Koren, Elmoustapha Ould-Ahmed-Vall, Michael Espig, Christopher J. Hughes +3 more | 2025-04-29 |
| 12282525 | Systems, methods, and apparatuses for matrix operations | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Robert Valentine +5 more | 2025-04-22 |
| 12282773 | Systems, methods, and apparatus for tile configuration | Menachem Adelman, Robert Valentine, Zeev Sperber, Mark J. Charney, Bret L. Toll +6 more | 2025-04-22 |
| 12277419 | Apparatuses, methods, and systems for instructions to convert 16-bit floating-point formats | Robert Valentine, Mark J. Charney, Menachem Adelman, Christopher J. Hughes, Evangelos Georganas +3 more | 2025-04-15 |
| 12265826 | Systems for performing instructions to quickly convert and use tiles as 1D vectors | Bret L. Toll, Christopher J. Hughes, Dan Baum, Elmoustapha Ould-Ahmed-Vall, Raanan Sade +2 more | 2025-04-01 |
| 12260213 | Systems, methods, and apparatuses for matrix add, subtract, and multiply | Robert Valentine, Dan Baum, Zeev Sperber, Jesus Corbal, Elmoustapha Ould-Ahmed-Vall +5 more | 2025-03-25 |
| 12236242 | Systems and methods to load a tile register pair | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Robert Valentine +5 more | 2025-02-25 |
| 12229554 | BFLOAT16 fused multiply instructions | Menachem Adelman, Robert Valentine, Zeev Sperber, Amit Gradstein, Mark J. Charney +4 more | 2025-02-18 |