AT

Archana Tankasala

IN Intel: 2 patents #858 of 3,896Top 25%
🗺 California: #9,729 of 55,090 inventorsTop 20%
Overall (2025): #140,357 of 469,880Top 30%
2
Patents 2025

Issued Patents 2025

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
12211563 Dynamic gate steps for last-level programming to improve write performance Sagar Upadhyay, Aliasgar S. Madraswala, Shantanu R. Rajwade 2025-01-28
12189955 Skip program verify for dynamic start voltage sampling Sagar Upadhyay, Shantanu R. Rajwade, Aliasgar S. Madraswala 2025-01-07