MY

Mehmet Can Yildiz

CS Cadence Design Systems: 5 patents #2 of 106Top 2%
🗺 Texas: #504 of 13,174 inventorsTop 4%
Overall (2025): #21,772 of 469,880Top 5%
5
Patents 2025

Issued Patents 2025

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
12423499 Resistance and capacitance aware preferred layer trimming Derong Liu, Charles J. Alpert 2025-09-23
12393760 Wire density-aware layer assignment Derong Liu, Wing-Kai Chow, Gracieli Posser, Charles J. Alpert 2025-08-19
12393763 Timing-based layer assignment Derong Liu, Wing-Kai Chow, Charles J. Alpert 2025-08-19
12314651 Zigzag detection and handling for integrated circuit design Hongxin Kong, Wing-Kai Chow 2025-05-27
12216977 Maximum turn constraint for routing of integrated circuit designs Wing-Kai Chow, Hongxin Kong 2025-02-04